• General-purpose I/O ports
• Address/Data ports
• Dual role of P0,P2
• InterruptsBit/byte addressable
• IC TechnologiesFour I/O port
• 8-bits each P0, P1, P2, P3
• Ports are like registers
• Difference: value tied to the pins
• Bit addressable
What does a port look like?
1. Register tied to pin
2. Open collector output
o P0 has no internal pull up
o P1, P2, P3 have internal pull-up
3. Bit addressable and Byte addressable\
Output: Write to port register
1. Byte access
P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
2. P1.7 is Most significant bit
P1.0 is Least significant bit
0 1 0 1 1 1 1 0
5 E
o MOV P1, #05EH
o Big-endian bit order
3. Bit access
o SETB P1.1 ;;sets port 1 bit 1
o CLR P2.3 ;; clears port 2 bit 3
for exampel in 7-Segment LED
• To write "0"
MOV P2, #7B ;; 0111 1011
• To Write "2"
MOV P2, #3D ;; 0011 1101
Input: reading from pins
1. Read pin value, not port-register value!!
o MOV A, P3 ;;read P3 pins, assign to A
2. Actually, pin & port may have different values
o A gets updated, but P3 register unchanged!
3. How to configure a port to input or output?
o Actually, it always outputs!
o Set port register to i if you want input!
example joystick input
1. First, P3 register should be 1111 1111
o Power-up default
2. Read P3 as a byte
o MOV A, P3
3. Read sigle bit (e.g up)
o MOV C, P3.0
Conflict between port register and pin
1. Register outputs 1 when input
2. Pin may input 0 or 1
3. Isn't this a short circuit?
o Actually, no
o input should "win"
4. Solution: open collector/open drain
o "weak 1" (overridable), "hard 0"
Bipolar vs MOS Transistors
Transistors are power controlled switches control signal=base or gate
Open collector/Open drain output
1. Off= connect to ground (0V)
2. On= "disconnect"
o Actually, "high impedance" (R2)
1. Voltage divider
o Vpin = Vcc * R2/(R1/R2)
o When R2>>R1, Vpin~~VCC
When R2= 0, Vpin~~0
Input value resolution
• Input pin = 1
o No conflict (register also pullup - 1)
=>read value = 1
• Input pin = 0
o register: pull-up to R1
o Vpin is pulled low by outside device
o R1 (10Kohm) draws current a price to pay, but logic works
Structure of Port P1
Reading a High value at input
Reading a Low value at Input pin
Port P0 is different from other I/0 ports
• No internal pull-up
o Ok as input
• Output --watch out!
o 0 is a real, hard zero
o 1 is a fake 1 (disconnect!)
• Solution
o Add external pull-up resistors
Structure of Port P0
Reasons for externalizing pullup
• Bus connection
o Multiple microcontrollers
o Bus pull-up, each MCU open collector
o "wired-AND" -- any zero pulls down bus
• Why not use built-in pull-up?
o Could be too many pull-ups!
o Pull-up too strong => hard to get clean 0
Example use of output with external pullup
• E.g., an LED
o Turn on when voltage difference > .7V
o I/O port voltage may be too high!
o Voltage divider => better matches voltage
• External pull-up voltage may be higher than MCU's output voltage
o Easy to "source" ("consume") current
What if port register bit = 0 during input?
• Could potentially short circuit!
o If input wire is tied to Vcc
• Solution: Always use pull-up
Three ways to avoid short circuit in input
• input switch with resistive pull-up
• input switch to ground
• input switch with a tristate
Alternative uses of P0, P2 pins
• For external memory
• P0 or AD0.. AD7
o address/data
o address : out
o data : in/out
• P2 or A15.. A8
o address: out
Alternative Uses of P3 pins
• For peripheral interface
o RxD, TxD: serial port
o INT0, INT11: interrupt
o T0, T1: timers
o WR, RD: memory
Example 4-1: toggle all bits every 1/4 second
ORG 0
BACK:
MOV A, #55
MOV P0, A
MOV P1, A
ACALL QSDELAY
MOV A, #AAH
MOV P0, A
MOV P1, A
ACALL QSDELAY
SJMP BACK
Timing control
• Q: How much to delay for "every 1/4"?
o Delay takes effect relative to the ACALL
o ACALL, SJMP, other overhead not handled
I/o bit manipulation
• Use bit instructions
o CPL P1.2 ;;complement port 1 bit 2
SETB P2.1 ;; assign port 2 bit 1 = 1
CLR P3.7 ;; assign port 3 bit 7 = 0
• Not all MCU instruction sets support bit op
o e.g., ATMEL AVR: access whole 8-bit port
P2 1 = 0 x 02; /*set P2.1 */
P3 & = 0 x 7F; /* clear P3.7 */
How to complement P1.2?
Duty cycle
• Percentage on time in a square wave
o 50% duty cycle
=> 50% on, 50% off
o 25% duty cycle
=> 25% on, 75% off
• Orthogonal to frequency
o each frequency can have diff. duty cycles
Application of duty cycling
• PWM: Pulse width modulation
o Use duty cycle to control average intensity
o Frequency should be sufficiently high
• Example
o motor speed
o brightness of light
Instructions
Rading input port
Example: polling
SETB P1.2
AGAIN: JNB P1.2, AGAIN
• Configure P.1 for input
• Keep looping as long as P1.2 ==0
=> waits till rising edge of P1.2
• Polling: keep checking I/0 in a loop Easy, fast but a little wasteful
• More "efficient" way: use interrupts
Use C as a general purpose bit register
• Carry flag (C) can be used as a bit register
• Alternative to previous polling code
Use MOV and JC/JNC
SETB P1.2
AGAIN: MOV C, P1.2
JNC AGAIN
Example: want to copy input bit to output
• Input P1.0, want to copy bit value to P2.7
• Cannot do
MOV P2.7, P1.0
=> no such instruction!
• Solution : use C as temporary
MOV C, P1.0
MOV P2.7, C
Reading from port-register instead of pin
Example of reading port register
• ANL P1, A ;; P1 :=P1 logical AND A
• This instruction has " read-modify-write" property
o Read a port register, modify the value, write back to the same port register
o All done "atomically" in one instruction
• Why is this a useful feature?
Atomic operation
• w/out read-modify-right, need 3 operations
o MOV A, P1
o ANL A, expression
o MOV P1, A
• But! if an interrupt occurs, value of A may be changed by the interrupt handler!
• Atomic means you can be sure operation is consistent even if interrupted
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