Session 5 : 8051 Addressing Modes

• Register addressing
• Immediate addressing
• Direct addressing
• Register-indirect addressing
• Indexed addressing
• Implicit addressing
• Bit addressing

Addressing mode = Way of specifying operand
1. An instruction consists of
    o Opcode (e.g., ADD, MOV,...) ~function
    o Operand(s) (e.g., R3, #23H,...) ~ parameter
2. Where is the (value of) operand located?
    o part of the instruction (immediate)
    o in data memory (direct, indirect, indexed)
    o in register; also, in a bit of a register/pin

Review: Register

1. 8-bit registers
    o General purpose: R0, R1,... R7
    o Special function: A, B, PSW, SP, I/O ports...
2. 16-bit registers
    o DPTR (=DPH, DPL)
    o PC is not an addressable register though
3. However! "Register addressing mode" refers to General Purpose one ONLY (R0..R7)

"Assembly" vs "Machine code" addressing mode
1. Book often assumes assembly-level
2. Strictly speaking, should be machine code representation of operand
3. Example: "register addressing mode"
    o Machine level: R0...R7 only
    o Assembly level: incl. all 8-bit reg, 16-bit
       =>actually those are "direct mode"

Register addressing mode 8051
• Encoded as part of the instruction byte
• A is implicitly addressed; Rxxx is explicit

Immediate Addressing
• Immediate comes from "data value immediately follows the opcode byte"
    o Meaning: constant value in an instruction
    o Example:
Green part: immediate
Blue part : register

Immediate may be multiple bytes
1. Example: MOV imm to the 16-b data pointer
    o MOV DPTR, #2550H ;; 2-byte immediate
    o code is 3-bytes; 90 25 50
    o DPTR is implicit
2. Assembler checks constant range
    o MOV DPTR, #68975 ;; causes asm error
    o #68975 is too large to fit in 2 bytes

Assembler label may be an immediate value
MOV DPTR, #Label
...
Label: DB "Hello world"
• The #Label part represents the address of the Label after the assembler determines its value
• fits the size of DPTR

Direct addressing
• Direct = address of operand
    o on-chip memory
    o Also mapped to general & special registers
    o pointer in a separate byte, like immediates
• Usage: when you name a register not as R0...R7, but everything else that's addressable
    o e.g., PSW, SP, I/O ports, DPH, DPL, address constant (as a label or constant)

Register vs Immediate vs direct addressing
• meaning of MOV A,0: take content at on-chip memory addr 0, copy it into the Accumulator

Subtle difference betw. Reg & Direct mode
1. MOV A, 0 ;;Direct mode => 2 bytes
    o at on-chip address 0,
    o mapped to R0 of bank 0 (four banks total)
2. MOV A, R0 ;;register mode =1 bytes!
    o register R0 of current bank
    o does not have to be bank zero!. Depends on PSW.3 and PSW.4

Special function registers
• Located at address >= 80H, up to FFH
    o Also for Timer, Interrupt control, Serial port, Power control (not shown in table)
    o Not all addresses are used

Implicit vs explicit direct addressing
• Accumulator has explicit address (E0H)
• Two ways: same functionality, but different encoding!

More example of implicit vs explicit:
• MOV DPTR, #2550H ;;3bytes
    o This is implicit addressing for DPTR (DPTR does not have a direct address!)
• MOV DPL, #50H ;;3bytes
  MOV DPH, #25H ;;3bytes
    o DPL, DPH are explicitly direct addressing => each requires 1 bytes
    o #50H, #25H each requires 1 byte

Implicit VS direct mode example cont'd

Limited combinations of addressing modes
• The opcode dictates operand's addr. modes
   o Assembly mnemonic may look the same, but they may be different opcodes

Disallowed addr. mode combinations
• Register-to-register MOV
    o e.g., MOV R1, R2
    o solution: go through A or use immediate
• Accumulator to Accumulator MOV (useless)
• anything-to-immediate MOV (nonsense)
    o e.g., MOV #20, R3

Addressing mode of PUSH/POP: direct mode
• Syntax:
    o PUSH dir ;; push val at dir to stack
       POP dir;; pop value to mem at dir
    o Explicit: dir ;; on-chip mem location
    o Implicit: SP (stack pointer)
• Example
    o PUSH 05 ;; on-chip addr = 05
Cannot say PUSH R5 ;; register mode

Restrictions and Workarounds

• COL 3 : PUSH, POP are available only in direct mode
• Another idiosyncrasy of assembler: it could just translate
  A =>0E 0H,
  B =>0F 0H

Direct addressing VS indirect addressing
• Direct addressing (e.g, MOV A, 02)
    o Pointer to operand is part of instruction (i.e., constant pointer, single-byte)
    o example here: pointer = 02, 0n-chip memory
• ( Register ) Indirect (e.g., MOV A, @R0>
    o Pointer to the operand value is found inside R0 or R1 (i.e., variable pointer)
    o example here: pointer is found in R0

Register addressing vs Register-indirect addr
• Register addressing (e.g., MOV A, R1)
    o R1 contains the operand value
• Register-indirect addressing (MOV A, @R1)
    o R1 contains the pointer to operand value.
       e.g., if R1 contains 20H, then operand is at on-chip memory address 20H
• R2,...R7 cannot be used with @

Example: Register vs Indirect mode


Copying constant to array: (1) direct

Copying constant to array: (2) indirect

Copying constant to array: (3) indirect + loop

Example: clear 16-byte array at address 60H

Example : loop 10 bytes *p++ = *q++;

Limitations of reg. indir. addressing in 8051
• For on-chip RAM only (1-byte pointer)
    o 30H-7FH, SFR namely 80H -FFH
    o Limited to R0 and R1 as pointers
• External RAM or on-chip ROM
    o need to use DPTR (2-byte pointer)

Indexed Addressing Mode
• Index: array access
    o Base address is in DPTR
    o Index (offset) is in A
• Instruction in the form ;; regs are all implicit
    o MOVC A, @A + DPTR
    o C means "code memory"
• Meaning: A=DPTR [A];

Example LooKup Table: x-ssquared
• INT TAble []={0, 1, 4, 9, 16, 25, 36, 49, 64, 81};
  for (;;) {P2 = Table [P1];}
• Assembly: Statically initialized array is DB:
  Table: DB 0, 1, 4, 9, 16, 25, 36, 49, 64, 81
• Use DPTR for base pointer to Table:
   MOV DPTR, #Table
• Lookup is
   MOV A, P1 ;;P1 as index
   MOVC A,@+DPTR ;;base +index

Program: write P2 = P1**2 continuosly

MOVC vs MOVX
• Both use 16-bit pointers
• MOVC: C= "code" space
• MOVX: X="external" data space
• Harvard architecture:
    o separate code/data. e.g., 8051
• "Princeton" architecture:
    o integrated code/data memory

Bit Addressing Mode
• Ability to specify a bit
    o Normally, address are for bytes
• Bit addressable areas
    o on-chip RAM at (byte-address) 20H--2FH each bit has a bit-address!
• I/0 ports P0...P3: 80H, 90H, A0H, B0H
• SFR: TCON, SCON, IE, IP, PSW, A, B, ACC

Session 4: I/O Port Programming

• General-purpose I/O ports
• Address/Data ports
• Dual role of P0,P2
• InterruptsBit/byte addressable
• IC TechnologiesFour I/O port

• 8-bits each P0, P1, P2, P3
• Ports are like registers
• Difference: value tied to the pins
• Bit addressable

What does a port look like?

 
 
 
 
 
 
 
 
 
 
1. Register tied to pin
2. Open collector output
    o P0 has no internal pull up
    o P1, P2, P3 have internal pull-up
3. Bit addressable and Byte addressable\

Output: Write to port register
1. Byte access
P1.7  P1.6  P1.5  P1.4  P1.3  P1.2  P1.1  P1.0

2. P1.7 is Most significant bit
    P1.0 is Least significant bit

            0 1 0 1   1 1 1 0
                5           E
            o MOV P1, #05EH
            o Big-endian bit order

3. Bit access
    o SETB P1.1 ;;sets port 1 bit 1
    o CLR P2.3 ;; clears port 2 bit 3

for exampel in 7-Segment LED
• To write "0"
   MOV P2, #7B     ;; 0111 1011

• To Write "2"
  MOV P2, #3D     ;; 0011 1101

Input: reading from pins
1. Read pin value, not port-register value!!
    o MOV A, P3 ;;read P3 pins, assign to A
2. Actually, pin & port may have different values
    o A gets updated, but P3 register unchanged!
3. How to configure a port to input or output?
    o Actually, it always outputs!
    o Set port register to i if you want input!
example joystick input

1. First, P3 register should be 1111 1111
    o Power-up default
2. Read P3 as a byte
    o MOV A, P3
3. Read sigle bit (e.g up)
    o MOV C, P3.0

Conflict between port register and pin

1. Register outputs 1 when input
2. Pin may input 0 or 1
3. Isn't this a short circuit?
    o Actually, no
    o input should "win"
4. Solution: open collector/open drain
    o "weak 1" (overridable), "hard 0"

Bipolar vs MOS Transistors
Transistors are power controlled switches control signal=base or gate

Open collector/Open drain output
1. Off= connect to ground (0V)
2. On= "disconnect"
    o Actually, "high impedance" (R2)

1. Voltage divider
    o Vpin = Vcc * R2/(R1/R2)
    o When R2>>R1, Vpin~~VCC
       When R2= 0, Vpin~~0

Input value resolution
• Input pin = 1
   o No conflict (register also pullup - 1)
      =>read value = 1

• Input pin = 0
   o register: pull-up to R1
   o Vpin is pulled low by outside device
   o R1 (10Kohm) draws current a price to pay, but logic works

Structure of Port P1
Reading a High value at input

Reading a Low value at Input pin

Port P0 is different from other I/0 ports
• No internal pull-up
   o Ok as input
• Output --watch out!
   o 0 is a real, hard zero
   o 1 is a fake 1 (disconnect!)
• Solution
   o Add external pull-up resistors

Structure of Port P0

Reasons for externalizing pullup

• Bus connection
   o Multiple microcontrollers
   o Bus pull-up, each MCU open collector
   o "wired-AND" -- any zero pulls down bus
• Why not use built-in pull-up?
   o Could be too many pull-ups!
   o Pull-up too strong => hard to get clean 0

Example use of output with external pullup
• E.g., an LED
   o Turn on when voltage difference > .7V
   o I/O port voltage may be too high!
   o Voltage divider => better matches voltage













• External pull-up voltage may be higher than MCU's output voltage
   o Easy to "source" ("consume") current

What if port register bit = 0 during input?
• Could potentially short circuit!
   o If input wire is tied to Vcc
• Solution: Always use pull-up

Three ways to avoid short circuit in input
• input switch with resistive pull-up
• input switch to ground
• input switch with a tristate

Alternative uses of P0, P2 pins

• For external memory
• P0 or AD0.. AD7
   o address/data
   o address : out
   o data : in/out
• P2 or A15.. A8
   o address: out

Alternative Uses of P3 pins

• For peripheral interface
   o RxD, TxD: serial port
   o INT0, INT11: interrupt
   o T0, T1: timers
   o WR, RD: memory

Example 4-1: toggle all bits every 1/4 second
ORG       0
BACK:
MOV      A, #55
MOV      P0, A
MOV      P1, A
ACALL  QSDELAY
MOV      A, #AAH
MOV      P0, A
MOV      P1, A
ACALL  QSDELAY
SJMP      BACK

Timing control
• Q: How much to delay for "every 1/4"?
   o Delay takes effect relative to the ACALL
   o ACALL, SJMP, other overhead not handled

I/o bit manipulation
• Use bit instructions
   o CPL P1.2 ;;complement port 1 bit 2
      SETB P2.1 ;; assign port 2 bit 1 = 1
      CLR P3.7 ;; assign port 3 bit 7 = 0
• Not all MCU instruction sets support bit op
   o e.g., ATMEL AVR: access whole 8-bit port
      P2 1 = 0 x 02; /*set P2.1 */
      P3 & = 0 x 7F; /* clear P3.7 */
      How to complement P1.2?

Duty cycle

• Percentage on time in a square wave
   o 50% duty cycle
      => 50% on, 50% off
   o 25% duty cycle
      => 25% on, 75% off
• Orthogonal to frequency
   o each frequency can have diff. duty cycles
Application of duty cycling
• PWM: Pulse width modulation
   o Use duty cycle to control average intensity
   o Frequency should be sufficiently high

• Example
   o motor speed
   o brightness of light

Instructions

Rading input port

Example: polling
SETB P1.2
AGAIN: JNB P1.2, AGAIN
• Configure P.1 for input
• Keep looping as long as P1.2 ==0
   => waits till rising edge of P1.2
• Polling: keep checking I/0 in a loop Easy, fast but a little wasteful
• More "efficient" way: use interrupts

Use C as a general purpose bit register
• Carry flag (C) can be used as a bit register
• Alternative to previous polling code
Use MOV and JC/JNC
SETB P1.2
AGAIN: MOV C, P1.2
JNC AGAIN

Example: want to copy input bit to output
• Input P1.0, want to copy bit value to P2.7
• Cannot do
   MOV P2.7, P1.0
   => no such instruction!
• Solution : use C as temporary
  MOV C, P1.0
  MOV P2.7, C

Reading from port-register instead of pin

Example of reading port register
• ANL P1, A ;; P1 :=P1 logical AND A
• This instruction has " read-modify-write" property
   o Read a port register, modify the value, write back to the same port register
   o All done "atomically" in one instruction
• Why is this a useful feature?

Atomic operation
• w/out read-modify-right, need 3 operations
   o MOV A, P1
   o ANL A, expression
   o MOV P1, A
• But! if an interrupt occurs, value of A may be changed by the interrupt handler!
• Atomic means you can be sure operation is consistent even if interrupted

Session 3 : Looping

1. Loops, Conditional jump instructions
2. Conditions determeining conditional jump
3. Unconditional long & short jumps
4. Calculate target addresses for jumps
5. using stack in subroutines
6. Crystal frequenscy vs machine cycle
7. Code programs to generate time delay

Looping ex.3-1

 

MOV    A,#0                     ;;init

MOV    R2,#10

Again:    ADD A,#03        ;;loop body

DJNZ    R2,Again             ;;while test

MOV    R5,A                   ;;after loop

 

> init: A=0; R2=10;

> Loop: do {A+=3;} While (--R2!-0);

   DJNZ means "decrement, jump if not zero"

> after: R5 = A;